Volume 22, Issue 2, April 2016, Pages 364–374
T.R. Dineshkumar1, M. Anto Bennet2, S. Geethapriya3, Y. Divya4, and K. Subbalakshmi5
1 Assistant Professor, Department of Electronics and Communication Engineering, VEL TECH, Chennai-600062, India
2 Professor, Department of Electronics and Communication Engineering, VELTECH, Chennai-600062, India
3 UG Student, Department of Electronics and Communication Engineering, VEL TECH, Chennai-600062, India
4 UG Student, Department of Electronics and Communication Engineering, VEL TECH, Chennai-600062, India
5 UG Student, Department of Electronics and Communication Engineering, VEL TECH, Chennai-600062, India
Original language: English
Copyright © 2016 ISSR Journals. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
Content addressable memories (CAMs) are type of computer memory that is used in search intensive applications. It involves content based searching. The conventional CAM is designed using MOSFET, due to which the power consumption is very high because of parallel architecture and short channel Effects such as leakage current. However, the current trend is to use a new non planar device architecture, the so called FinFET to overcome the problems of planar MOSFET stated above. Among the alternatives to planar MOSFET, FinFET is proved to be more efficient in terms of power. Although the CAM using FinFET is efficient ,it is volatile. In order to make it non-volatile, a new element called memristor can be used. Also, when the device is idle,the leakage will be high. This can be overcome by the use of MT-CMOS for power gating. This paper proposes a novel design of NOR content addressable memory bit cell using memristor and MT-CMOS in 22-nm FinFET Technology. The design has been simulated in 22nm FinFET technology using Tanner EDA tool.
Author Keywords: Content addressable memories (CAMs), FinFET, memristor, MT-CMOS, Short channel Effects, Tanner EDA, Power Gating Technique.
T.R. Dineshkumar1, M. Anto Bennet2, S. Geethapriya3, Y. Divya4, and K. Subbalakshmi5
1 Assistant Professor, Department of Electronics and Communication Engineering, VEL TECH, Chennai-600062, India
2 Professor, Department of Electronics and Communication Engineering, VELTECH, Chennai-600062, India
3 UG Student, Department of Electronics and Communication Engineering, VEL TECH, Chennai-600062, India
4 UG Student, Department of Electronics and Communication Engineering, VEL TECH, Chennai-600062, India
5 UG Student, Department of Electronics and Communication Engineering, VEL TECH, Chennai-600062, India
Original language: English
Copyright © 2016 ISSR Journals. This is an open access article distributed under the Creative Commons Attribution License, which permits unrestricted use, distribution, and reproduction in any medium, provided the original work is properly cited.
Abstract
Content addressable memories (CAMs) are type of computer memory that is used in search intensive applications. It involves content based searching. The conventional CAM is designed using MOSFET, due to which the power consumption is very high because of parallel architecture and short channel Effects such as leakage current. However, the current trend is to use a new non planar device architecture, the so called FinFET to overcome the problems of planar MOSFET stated above. Among the alternatives to planar MOSFET, FinFET is proved to be more efficient in terms of power. Although the CAM using FinFET is efficient ,it is volatile. In order to make it non-volatile, a new element called memristor can be used. Also, when the device is idle,the leakage will be high. This can be overcome by the use of MT-CMOS for power gating. This paper proposes a novel design of NOR content addressable memory bit cell using memristor and MT-CMOS in 22-nm FinFET Technology. The design has been simulated in 22nm FinFET technology using Tanner EDA tool.
Author Keywords: Content addressable memories (CAMs), FinFET, memristor, MT-CMOS, Short channel Effects, Tanner EDA, Power Gating Technique.
How to Cite this Article
T.R. Dineshkumar, M. Anto Bennet, S. Geethapriya, Y. Divya, and K. Subbalakshmi, “Design of an efficient NOR Content Addressable Memory Bit cell Using memristor and MT-CMOS in FinFET Technology,” International Journal of Innovation and Scientific Research, vol. 22, no. 2, pp. 364–374, April 2016.
